[Lab] Fwd: Re: So any CPLD/FPGA coding Gurus out there
Jaime Yu
jaime.yu at gmail.com
Tue Aug 5 14:07:40 EDT 2014
@janicm
+1 for #3. Verilog and synthesis.
--
Sincerely,
Jaime Yu
B.Eng in Computer Engineering, System Hardware
Kernel Software Engineer at Juniper Networks
$CV = "http://cv.jaimeyu.com"
$Blog = "http://ask.jaimeyu.com"
$Project = "http://www.capstone490.com"
$Linkedin = https://www.linkedin.com/in/jaimeyu
$GitHub = https://github.com/jaimeyu
On Aug 5, 2014 1:47 PM, <janick at bergeron.com> wrote:
> There are many layers to this topic. It would be important to know which
> one is most needed:
>
>
>
> 1) How do field-programmable devices work
>
> 2) Synchronous digital design and Finite-State Machines
>
> 3) Verilog and Logic Synthesis
>
> 4) and my personal favorite: Making sure you are implementing what you
> think you are implementing
>
>
>
>
>
> _______________________________________________
> Lab mailing list
> 1. subscribe http://artengine.ca/mailman/listinfo/lab
> 2. then email Lab at artengine.ca to send your message to the list
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://artengine.ca/pipermail/lab/attachments/20140805/3ab76988/attachment.html>
More information about the Lab
mailing list