<p dir="ltr">@janicm</p>
<p dir="ltr">+1 for #3. Verilog and synthesis. </p>
<p dir="ltr">--<br>
Sincerely,<br>
Jaime Yu<br>
B.Eng in Computer Engineering, System Hardware<br>
Kernel Software Engineer at Juniper Networks</p>
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$Linkedin = <a href="https://www.linkedin.com/in/jaimeyu">https://www.linkedin.com/in/jaimeyu</a><br>
$GitHub = <a href="https://github.com/jaimeyu">https://github.com/jaimeyu</a></p>
<p dir="ltr"> </p>
<div class="gmail_quote">On Aug 5, 2014 1:47 PM, <<a href="mailto:janick@bergeron.com">janick@bergeron.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<u></u>
<div style="font-size:10pt;font-family:Verdana,Geneva,sans-serif">
<p>There are many layers to this topic. It would be important to know which one is most needed:</p>
<p> </p>
<p>1) How do field-programmable devices work</p>
<p>2) Synchronous digital design and Finite-State Machines</p>
<p>3) Verilog and Logic Synthesis</p>
<p>4) and my personal favorite: Making sure you are implementing what you think you are implementing</p>
<p> </p>
<p> </p>
</div>
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